According to the International Technology Roadmap for Semiconductors (ITRS), image placement requirements for optical masks was 7 nm for node N65. However, current optical mask registration for node N65 is as much as 18 nm, or more than twice the predicted requirement. Moreover, for node N45, the optical mask registration requirement is predicted to decrease to 4.8 nm, although achievable registration is predicted to only be as small as 15 nm. Similarly, for node N32, the optical mask registration requirement is predicted to decrease to 3.4 nm, although achievable registration is predicted to only be as small as 12 nm.
One possible factor in the existing and predicted inability to achieve sufficiently accurate optical mask registration is the impact of stress in the mask blank. For example, even where the blank stress is low by current standards, the contact overlay to poly is near 16 nm, which is significantly greater than the predicted requirements for optical mask registration. Moreover, differences in pattern Cr loading (or density) between different masks employed during different phases of manufacture can result in different stress distributions of each mask, which can further adversely affect mask registration.